1. Field of the Invention
This invention relates to a phase comparator which is well adaptable for a low voltage used in a PLL (Phase Locked LOOP) circuit and so forth.
2. Description of the Prior Art
In order to have a better understanding of the present invention, description will first be made of a conventional phase comparator with reference to FIG. 1 of the accompanying drawings, which a pair of differential amplifiers in combination. More specifically, the phase comparator shown in FIG. 1 comprises a differential pair of transistors Q30, Q31 and a current source transistor Q32; a second differential pair of transistors Q33, Q34 and a current source transistor Q35; a constant current source circuit 20 comprising transistors Q36 and Q37; and load resistors R5, R6.
Input signal is supplied to the bases of the transistors Q32 and Q35 (input terminals 25 and 26) so that the proportion of bias currents for these two transistors is thereby controlled. The two differential pairs of transistors Q30, Q31 and Q33, Q34 are provided at their bases with oscillation output of a voltage-controlled oscillator (VCO) or the like from terminals 23 and 24, so as to be alternately rendered operative so that an output corresponding to the phase difference between the input signal and the oscillation output of the voltage-controlled oscillator is obtained at output terminals 21 and 22. By smoothing the output obtained at the output terminals 21 and 22, a DC output corresponding to the phase difference is provided. When the phase difference of the input signal from the output of the voltage-controlled oscillator is 0.degree., for example, the DC output is positive; when the phase different is 90.degree., the DC output is zero; and when the phase difference is 180.degree., the DC output is negative.
Recently, it has been a common trend that portable radio receiver or the like is designed to operable with a lower voltage; thus it has been required that stable operation be able to be performed with a power source voltage equal to or lower than 1V. With the conventional phase comparator shown in FIG. 1 wherein the phase difference is detected by alternately switching the current source transistors Q32 and Q35 by means of the differential transistor pairs Q30, Q31 and Q33, Q34 respectively, however, it is required that bias voltage applied to the bases of the transistors Q30 to Q36 be higher than the sum of the base-emitter voltage VBE of the transistor Q30 and the collector-emitter saturation voltage VCE(sat), i.e., (VBE+2VCE(sat)). More specifically, assuming that VBE is 0.7V and that VCE(sat) is 0.2V, then the sum becomes as high as about 1.1V; thus, difficulties have been experienced in an attempt to operate the above-mentioned conventional phase comparator with a power source voltage equal to or lower than 1V.